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Intel’s Speed Shift Validates ‘Bitsum Highest Performance’ Power Plan /w Skylake and Kabylake Generation CPUs

For a long time now, Bitsum has been telling users that, even in the default Windows High Performance power plan, core parking and CPU frequency scaling causes performance problems during bursting CPU loads, which are the most common type. Now, we get to say: We Told You So!

That’s right, Intel’s new Speed Shift technology has validated what we’ve said for years – that OS managed CPU core parking and frequency scaling have a bigger impact on performance than what we were led to believe!

Intel announced that their new Speed Shift technology, part of their Skylake generation of processors, will move core parking and frequency scaling responsibilities away from the OS and onto the hardware to allow for more efficient ramp-up time. This Arstechna article presents the SkyLake changes better than me.  But you don’t have to wait for a new CPU…

Our ParkControl freeware offers users full control of the CPU core parking settings and CPU frequency settings for every power plan. The CPU core parking settings are hidden by default, which is why it was initially created, but then the utility grew. It also provides a real-time display of both core parking and frequency scaling. With ParkControl Pro, a user can completely disable CPU core parking and frequency scaling for any specified power plan, or they can merely dial it back a bit.

Further, Process Lasso comes with our Bitsum Highest Performance power plan, part of what we call ‘Gaming Mode’ (though it’s really a ‘highest performance mode’). This power plan has been pre-configured with core parking and frequency scaling disabled.

We all knew our innovative ProBalance technology worked wonders at maintaining system responsiveness, as we have great synthetic and real-world tests of such. Now we have real-world external validation of another pillar of our innovation at Bitsum.

For a video on this new Speed Shift tech from Intel, see this link.

If you like our work, please consider purchasing a license. We try to make our software as free as possible. Process Lasso can be used indefinitely and it’s core features like ProBalance never disable. ParkControl Pro is almost entirely free, but paid users get a neat single-click updater like the one found in Process Lasso. It is with YOUR contributions that we can continue to innovate. 

Speaking of that, I’d like to leave with a message of gratitude to all those who have purchased licenses, or even made donations to support our no-nonsense work. Thank you!


UPDATE Aug 7, 2016: We now know the GUIDs of the subsystems that control this new hardware-backed CPU core parking – This will be part of ParkControl and Gaming Mode in future updates of our software, so you don’t need to worry much with them. If modifying them (and remember, this only even applies if you have a brand new Skylake CPU and Win10), *please* use powercfg.exe as described on our ParkControl page, or unhide these settings using the .REG on that page, or use ParkControl itself if support has since been added.

8baa4a8a-14c6-4451-8e8b-14bdbd197537 – Processor performance autonomous mode (Enable/Disable)
Specify whether processors should autonomously determine their target performance state.

36687f9e-e3a5-4dbf-b1dc-15eb381c6863 – Processor energy performance preference policy (Percent)
Specify how much processors should favor energy savings over performance when operating in autonomous mode.

cfeda3d0-7697-4566-a922-a9086cd49dfa – Processor autonomous activity window (Microseconds)
Specify the time period over which to observe processor utilization when operating in autonomous mode.

4e4450b3-6179-4e91-b8f1-5bb9938f81a1 – Processor duty cycling
Specify whether the processor may use duty cycling.

UPDATE: Not that if you have a Skylake or Kaby Lake, it is *still* a good idea to turn off CPU core parking during high performance tasks. In other words, our software is still a good idea. That is because there is still ramp-up time, and the ‘hints’ the OS gives to the CPU are imperfect.

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